* Decoder version: 5.1.0.2 void Mocha_X25E; LABL 0 0 0 b1 X.25 - Level 2 Frame (mod 128); DECR 4 0 0 0; GBYT 1 1 0 0; INCR 4 0 0 0; GBYT 1 2 0 0; HEX# 1 0 90 b2 Cmd/Rsp = ; TNXT 0 0 0 0 EX2_FCF; void EX2_DCE; TNXT 0 0 0 0 EX2_FCF; void EX2_DTE; TNXT 0 0 0 0 EX2_FCF; void EX2_FCF; GBYT 1 1 0 0; GBYT 1 2 0 0; GBYT 1 3 0 0; TBIT 0 1 0 0 EX2_FSU; TLSE 0 0 0 0 EX2_FINF; void EX2_FSU; ANDG 0F 1 0 0; TEQU 01 1 0 0 EFSU_60; TEQU 05 1 0 0 EFSU_60; TEQU 09 1 0 0 EFSU_60; LABL 0 0 0 b2 Unnumbered Frame; HEX# 1 0 90 0; ANDG EF 2 0 0; CEQU 0f 2 20 20 DM - Disconnect Mode; TEQU 0f 2 0 0 EFSU_PF; CEQU 2f 2 20 20 SABME - Set Async Bal Mode Ext; TEQU 2f 2 0 0 EFSU_PF; CEQU 43 2 20 20 DISC - Disconnected; TEQU 43 2 0 0 EFSU_PF; CEQU 63 2 20 20 UA - Unnumbered Ack; TEQU 63 2 0 0 EFSU_PF; CEQU 87 2 20 20 FRMR - Frame Reject; TEQU 87 2 0 0 EFSU_PF; LABL 0 0 20 20 = Invalid; TNXT 0 0 0 0 EX25_L2_LAST; void EFSU_PF; CBIT 4 3 0 24 P/F= 1; CLSE 0 0 0 24 P/F= 0; TNXT 0 0 0 0 EX25_L2_LAST; void EFSU_60; LABL 0 0 0 b2 Supervisory Frame; HEX# 1 0 90 0; ANDG 0F 1 0 0; CEQU 01 1 20 20 RR - Receive Ready ; TEQU 01 1 0 0 EFSU_64; CEQU 05 1 20 20 RNR - Receive Not Ready ; TEQU 05 1 0 0 EFSU_64; CEQU 09 1 20 20 REJ - Frame Reject ; TEQU 09 1 0 0 EFSU_64; void EFSU_64; GBYT 1 2 0 0; INCR 1 0 0 0; ANDG FE 2 0 0; DIVG 2 2 0 0; DGLB 0 2 20 14 N(R)= ; CBIT 0 2 20 14 P/F= 1; CLSE 0 0 20 14 P/F= 0; TNXT 0 0 0 0 EX25_L2_LAST; void EX25_L2_LAST; PRV4 0 04 05 05; CHR# 0 04 05 05; void EX2_FINF; LABL 0 0 0 b2 Information Frame; HEX# 1 0 90 0; ANDG FE 1 0 0; DIVG 2 1 0 0; INCR 1 0 0 0; DGLB 0 1 0 24 N(S)= ; GBYT 1 2 0 0; INCR 1 0 0 0; ANDG FE 2 0 0; DIVG 2 2 0 0; DGLB 0 2 0 14 N(R)= ; CBIT 0 2 20 14 P/F= 1; CLSE 0 0 20 14 P/F= 0; TNXT 0 0 0 0 EX25_GFI; void EX25_GFI; GBYT 1 1 0 0; GBYT 1 2 0 0; GBYT 1 3 0 0; LABL 0 0 0 b1 X.25 - Level 3 Packet (mod 128); LABL 0 0 0 82 GFI/LCG ; GBYT 1 1 0 0; HEX# 1 0 90 0; CBIT 7 1 20 14 Q= 1; CLSE 0 0 20 14 Q= 0; CBIT 6 1 20 14 D= 1; CLSE 0 0 20 14 D= 0; ANDG 0F 1 0 0; ADDG 1 1 0 0; LABL 0 0 0 82 LCG = ; CST# 0 1 90 50 LCG_Hex; TNXT 0 0 0 0 EX25_LCN; str# LCG_Hex; 0x00; 0x01; 0x02; 0x03; 0x04; 0x05; 0x06; 0x07; 0x08; 0x09; 0x0a; 0x0b; 0x0c; 0x0d; 0x0e; 0x0f; void EX25_LCN; HEX# 1 0 90 C2 LCN = ; GBYT 1 1 0 0; GBYT 1 2 0 0; GBYT 1 3 0 0; TBIT 0 1 0 0 EL3_PSU; TLSE 0 0 0 0 EL3_PINF; void EL3_PSU; ANDG 1F 1 0 0; TEQU 01 1 0 0 EPSU_60; TEQU 05 1 0 0 EPSU_60; TEQU 09 1 0 0 EPSU_60; LABL 0 0 0 b2 Unnumbered Frame; HEX# 1 0 90 0; CEQU 0b 2 90 20 CALL - Call Request Packet; TEQU 0b 2 0 0 PU_CALL; CEQU 0f 2 90 20 CAA - Call Accept; TEQU 0f 2 0 0 PU_CAA; CEQU 13 2 90 20 CLR - Clear Request; TEQU 13 2 0 0 PU_CLR; CEQU 17 2 90 20 CLC - Clear Confirm; TEQU 17 2 0 0 PU_CLC; CEQU 23 2 90 20 INT - Interrupt Request; TEQU 23 2 0 0 PU_INT; CEQU 27 2 90 20 INC - Interrupt Confirm; TEQU 27 2 0 0 PU_INC; CEQU 1b 2 90 20 RST - Reset Request; TEQU 1b 2 0 0 PU_RST; CEQU 1f 2 90 20 RSC - Reset Confirm; TEQU 1f 2 0 0 PU_RSC; CEQU fb 2 90 20 RES - Restart Request; TEQU fb 2 0 0 PU_RES; CEQU ff 2 90 20 REC - Restart Confirm; TEQU ff 2 0 0 PU_REC; LABL 0 0 90 20 = Invalid; TNXT 0 0 0 0 X25_L3_LAST; void EPSU_60; LABL 0 0 0 b2 Supervisory Packet; HEX# 1 0 90 0; ANDG 0f 1 0 0; CEQU 01 1 20 20 RR - Receive Ready; TEQU 01 1 0 0 EPSU_64; CEQU 05 1 20 20 RNR - Receive Not Ready; TEQU 05 1 0 0 EPSU_64; CEQU 09 1 20 20 REJ - Frame Reject; TEQU 09 1 0 0 EPSU_64; void EPSU_64; GBYT 1 2 0 0; INCR 1 0 0 0; ANDG FE 2 0 0; DIVG 2 2 0 0; DGLB 0 2 0 24 P(R)= ; TNXT 0 0 0 0 EX25_L3_LAST; void EX25_L3_LAST; PRV4 0 04 05 05; CHR# 0 04 05 05; void EL3_PINF; LABL 0 0 0 b2 Information Packet; GBYT 1 1 0 0; GBYT 1 2 0 0; GBYT 1 3 0 0; HEX# 1 0 90 0; ANDG FE 1 0 0; DIVG 2 1 0 0; DGLB 0 1 0 24 P(S)= ; GBYT 1 2 0 0; INCR 1 0 0 0; ANDG FE 2 0 0; DIVG 2 2 0 0; DGLB 0 2 0 14 P(R)= ; CBIT 0 2 20 14 M = 1; CLSE 0 0 20 14 M = 0; BREM 0 4 05 05; TEQU 0 4 0 0 X25I_DONE; LABL 0 0 0 b1 EX25 INFO Packet data - ; DGLB 0 4 01 01 bytes = ; TNXT 0 0 0 0 EX25_INFO_LINES_DISP; void EX25_INFO_LINES_DISP; TGTE 1f 04 0 0 EX25_INFO_LINES_DONE; CHR# 20 0 93 C2; SUBG 20 04 0 0; TNXT 0 0 0 0 EX25_INFO_LINES_DISP; void EX25_INFO_LINES_DONE; TEQU 0 4 0 0 X25I_DONE; CHR# 0 04 93 C2; void X25I_DONE;